סמינר: ACRC
Static Timing: Modelling, Analysis, and Timing-aware Optimization
ACRC offers an Advanced Short Course for 3 days,
Course Name: Static Timing: Modelling, Analysis, and Timing-aware Optimization
Lecturer: Dr. Konstantin Moiseev, Synopsys and Technion
Date: October 19-21, 2025
Time: 9:00 – 16:00 Israel Time
Location: Auditorium 1003, Meyer Building, Technion
Language: Hebrew
Course Content:
In modern VLSI design, timing is everything. As technology continues to scale and performance demands increase, ensuring that a chip meets its timing requirements has become one of the most critical and complex challenges in digital design. Timing analysis and optimization have evolved significantly over the years, growing more intricate due to two major classes of effects associated with node scaling:
- Micro-level effects: These stem from emerging physical phenomena at the device or interconnect level, driven by shrinking feature sizes.
- Macro-level effects: These arise from the increasing complexity and size of circuits, enabled by the ability to integrate more logic onto a single die.
Addressing micro-level effects calls for novel modeling and analysis techniques, while macro-level challenges demand highly efficient algorithms to manage the escalating scale of timing analysis. Accurate timing analysis is essential to achieving fast and reliable timing closure. It must be integrated throughout the entire design flow—from high-level RTL and behavioral models, through logic synthesis and transistor-level optimization, to final layout—adapting to the available information at each stage. This course offers a comprehensive exploration of Static Timing Analysis (STA), blending foundational theory with practical, in-depth coverage of key topics, including:
- Interconnect and cell modeling
- Timing propagation
- Library characterization
- Constraint specification
- Variability and crosstalk effects
Additionally, the course provides a rare opportunity to delve into device-level STA, a topic often underrepresented in traditional VLSI education.
More details | Registration form
ACRC executive members, students from all Israeli Universities, and Technion employees can attend the course for free.
Anyone else can register based on membership conditions or payment of 1700$.
For more details please contact:
Ofira Levanon
Industry Relations and ACRC Coordinator