ACRC Seminar by Prof. Boris Vaisband, UCLA Enabling Scaled-Out Chiplet-Based Hardware for AI Applications

The demand for computation and memory in applications such as large language models (LLM), has increased well beyond the reticle boundaries of a system-on-chip (SoC). Chiplet-based integration is a paradigm shift that shapes the way we design future high-performance systems. The concept is to step away from large SoCs that are limited by communication, thermal design power, and reticle size, toward a robust plug-and-play approach, where small, heterogeneous, off-the-shelf chiplets are seamlessly integrated on a single platform. The chiplets paradigm, together with advanced packaging technologies, supports designing ultra-large-scale hardware that is compatible with LLM-type applications. In this talk, we will discuss the current state-of-the-art and challenges in chiplet integration, introduce the silicon interconnect fabric (Si-IF)–a wafer-scale heterogeneous integration platform, and offer solutions to enable large-scale AI applications.

The registration link will be updated at a later date.