Seminar: ACRC Webinar
Enabling Scaled-Out Chiplet-Based Hardware for AI Applications
The demand for computation and memory in applications such as large language models (LLM), has increased well beyond the reticle boundaries of a system-on-chip (SoC). Chiplet-based integration is a paradigm shift that shapes the way we design future high-performance systems. The concept is to step away from large SoCs that are limited by communication, thermal design power, and reticle size, toward a robust plug-and-play approach, where small, heterogeneous, off-the-shelf chiplets are seamlessly integrated on a single platform. The chiplets paradigm, together with advanced packaging technologies, supports designing ultra-large-scale hardware that is compatible with LLM-type applications. In this talk, we will discuss the current state-of-the-art and challenges in chiplet integration, introduce the silicon interconnect fabric (Si-IF)–a wafer-scale heterogeneous integration platform, and offer solutions to enable large-scale AI applications.
Bio:
Boris Vaisband (Senior Member, IEEE) is the Samueli Development Chair Assistant Professor at the University of California, Irvine, working on heterogeneous systems integration.
In 2024 he was a Visiting Professor at UCLA and the Acting Director of UCLA CHIPS, and from 2019 to 2024, an Assistant Professor at McGill University. He received a B.S. degree in Computer Engineering from the Technion – Israel Institute of Technology in 2011, and M.S. and Ph.D. degrees in Electrical Engineering from the University of Rochester, in, respectively, 2012 and 2017. From 2017 to 2019, he was a Postdoctoral Scholar at UCLA. From 2008 to 2015, he held various hardware design positions at Intel, Cisco, and Google.
His current research interests are in chiplets-based systems, heterogeneous integration, advanced packaging, and neuromorphic systems, with a focus on circuits, EDA tools, and design methodologies for power delivery, communication, thermal aware design and floorplanning, and testing. Some applications of interest are ultra-large-scale artificial intelligence systems and high-performance computing.
Important: Registration is required.
This event is hybrid and the Zoom link will be sent after registration.