Seminar: Guest Lecture

ECE Women Community

High-Speed CMOS Silicon Photonic PAM4 Transceiver Front-Ends for Datacenter Communication

Date: March,05,2026 Start Time: 11:30 - 12:30
Location: 608, New Zisapel Building
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Growing interconnect bandwidth demand in large datacenters requires energy-efficient optical transceivers that operate with four-level pulse amplitude modulation (PAM4) to enable high per-wavelength data rates. Further increases in bandwidth density is possible by leveraging wavelength-division multiplexing (WDM), which optical link architectures based on silicon photonic microring modulators (MRMs) and drop filters inherently enable. This talk covers high-speed PAM4 transmitter and receiver front-ends implemented in a 28nm CMOS process that are co-designed with these silicon photonic optical devices to enable energy-efficient operation. The transmitter utilizes an optical digital-to-analog converter (DAC) approach with two PAM2 AC-coupled pulsed-cascode high-swing voltage-mode output stages to drive the MRM MSB/LSB segments. A 3.42Vppd output swing is achieved when operating at 80Gb/s PAM4 with an energy efficiency of 3.66pJ/bit. The optical receiver utilizes a low-bandwidth input transimpedance amplifier followed by continuous-time linear equalizer, variable-gain amplifier stages, and a digital clock-and-data recovery system. 100Gb/s PAM4 operation is achieved with -6.4dBm sensitivity at 1.4×10-4 BER and 1.32pJ/bit energy efficiency.

 

Bio:

Samuel Palermo (S’98-M’07-SM’17) received the B.S. and M.S. degrees in electrical engineering from Texas Agricultural and Mechanical University, College Station, TX in 1997 and 1999, respectively, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA in 2007.

From 1999 to 2000, he was with Texas Instruments, Dallas, TX, where he worked on the design of mixed-signal integrated circuits for high-speed serial data communication. From 2006 to 2008, he was with Intel Corporation, Hillsboro, OR, where he worked on high-speed optical and electrical I/O architectures. In 2009, he joined the Electrical and Computer Engineering Department of Texas A&M University where he is currently the J. W. Runyon Jr. Professor. His research interests include high-speed electrical and optical interconnect architectures, RF photonics, radiation-hardened electronics, and AI computing hardware.

Dr. Palermo is a recipient of a 2013 NSF-CAREER award. He is a member of Eta Kappa Nu and IEEE. He is currently an associate editor for IEEE Journal of Solid-State Circuits and has previously served in this role for IEEE Solid-State Circuits Letters and IEEE Transactions on Circuits and System – II. He has also previously served as a distinguished lecturer for the IEEE Solid-State Circuits Society and on the IEEE CASS Board of Governors. He was a coauthor of the Jack Raper Award for Outstanding Technology-Directions Paper at the 2009 International Solid-State Circuits Conference, the Best Student Paper at the 2014 Midwest Symposium on Circuits and Systems, an Outstanding Student Paper Award at the 2018 Custom Integrated Circuits Conference, and the Best Student Paper Award at the 2024 Opto-Electronics and Communications Conference. He received the Texas Agricultural and Mechanical University Department of Electrical and Computer Engineering Outstanding Professor Award in 2014 and the Engineering Faculty Fellow Award in 2015.

 

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