Composable Chiplets

Chiplets present a compelling approach to reducing the cost and time of chip design by raising the abstraction level to the die. In this talk, I will share my decade-long experience with chiplets and examine the current challenges blocking effective chiplet-based design for startups, government, and academia. Additionally, I will introduce recent work on composable (“interchangable”) chiplets, where O(M^N) unique silicon systems can be assembled from N chiplets arbitrarily selected from a library of size M. To illustrate the potential of this approach, consider a 10 chiplet system built from a library of 10 chiplets, enabling the creation of 10⁹ unique configurations. In contrast, fewer than 10³ unique chip tapeouts occur worldwide each year.  Standing up a practical composable chiplet platform on par with the existing SoC design ecosystem will require enormous investments, but if done right has the potential of fundamentally disrupting the semiconductor industry.

Biography:

Andreas Olofsson is the founder and CEO of Zero ASIC, a semiconductor startup on a mission to democratize silicon. From 2017 – 2020, Andreas was a program manager at DARPA, where he managed 8 different US research programs in heterogeneous integration, EDA, high performance computing, machine learning, and analog computing. From 2008-2017, Andreas founded and managed Adapteva, an ultra lean fabless semiconductor startup that led the industry in processing energy efficiency. Prior to Adapteva he worked at Analog Devices for 10 years as a design manager and architect for advanced DSPs and mixed signal devices, developing products that shipped in over 100 million systems. Andreas received his Bachelor of Science in Physics and Electrical Engineering and Master of Science in Electrical Engineering from the University of Pennsylvania. He is a senior member of IEEE and holds nine U.S. patents.

Registration Link: https://acrc.net.technion.ac.il/2947-2/

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